I dont know if anybody would be interested to know anything about IC design at all.. well maybe just a bit. .. so I wont go into too many details here, but if you are really interested to discuss any of this with me, you are most welcome to do so.

Physical verification of IC layout design is what I specialize in. For the 1st 5yrs of my work in IC design, I was a user of layout verification tools and systems. After that, I switch over and work in the enhancement of this tools and write applications for the designers. This had been my job for the past 10years. If you wanted to know the history of IC layout design and how physical verification systems have evolved, ask me.. or some others before me, but there is only a handful of us kind of people in this world.

The grand old days (before my time)

The 1st micro circuit that work was produced too long ago.. I could research that history .. (or you could do it yourself if you so wished to know).. The beginning of a exciting new world. Researchers then flocked together to discover more and more about this new method of doing something.. and they have no idea what a life changing discovery this was going to be! This is a link to a simple history leading to the beginning of IC technology. http://nobelprize.org/educational_games/physics/transistor/history/

timelineThe 1st transistor, then the 1st chip that contained 10 transistors, then the 1st chip that contained enough transistors to form a function.. or called a microprocessor. … 30yrs passed and tada! The computer! 50yrs passed and the internet!

Here we are!

70yrs passed and here we are, internet gaming, social life on the net and blogging! Approx 70yrs after the 1st transistor was made…

The chronicles of IC layout verification

Before 1970, IC was designed on paper! There were no computing system and the term “software” was not yet invented. The circuits were simple and the layout was drawn with pencils and rulers, and the physical geometries were checked by eyeballs.

The next challenge was always to make it smaller. How small can it go? .. on hindsight, we have gone smaller than we ever thought possible.. When it was possible to put 1000 micro devices on chip, it was getting difficult to draw the layout and check using eyeballs.. That created the need for a design tool and a way to check the layout.. hmm.. how could you do that in the 70s? .. wait, whats that thing called computer? Anyway, it was a chicken and egg thing. Did computer come 1st or the microchip?

80s, was when the 1st commercially available layout design system (software) was sold. Checkmate and Caeco. .. Some may dispute it being the 1st.. .. Well, before these softwares wewe commercially available, engineers in those big corporations developed their own system of designing and checking. The better ones were enhanced and made into a software product later. Nobody thought that software would become a big thing in itself … Like IBM didnt think that software was worth anything, but it created one of the world’s richest man.

In a nutshell, this is design flow

In a nutshell, this is design flow

90s, thats when I started working in this exciting new industry. I used Checkmate and Caeco 1st, and switched over to the Virtuoso / Dracula tools for obviously reasons. I witness the changing of technology from 0.8um thru to 28nm… in 15years. This is the digital revolution! Digital circuits will million transistors are just the norm. New software with better features targetted at IC design were introduced at record pace. The outstanding ones of this time continues to flourish in the next century. Softwares like Virtuoso, Calibre, Astro are still very much dominant in the current time that I am writing.. Companies which owned these tools are Cadence, Synopsys and Mentor Graphics, dominants the Electronic Design Automation space. Small guys going into this space are literally strangled.

200+, entering the billion transistors era! yep, billion. One could imagine the drain on computing power to even create that tiny size mega chip. .. Well, so what do we do with computing power anyway, if not for creating even more power.. and really using less electric power.. Here we go, plunge right into the mobile communications and computing era!

Hope u enjoyed the brief history. Now back to physical verification systems.

Beyond design and checking

Current state of Physical Verification process

Current state of Physical Verification process

I am not sure why, but I stopped doing layout design in 2001. It was not really a conscious decision to stop doing design, .. but I was very interested in the physical verification aspect of the design, automation of systems to check and fix errors, polygon manipulation and layer generation. So I joined Mentor Graphics and was very involved in these topics that intrigued me. I was always a designer at heart and wanted to create solutions to layout design for the IC designers.

These are some solutions that I have created, and implemented using Calibre, PERL and TCL.

  1. Automated layout manipulations for technology transfer.
  2. System for locating short circuits on layout, including substrate /well level shorts.
  3. Automated system of layout compare.
  4. Redundant via insertion for yield enhancement in 65nm.
  5. Table driven layout generation for testcase creation

It was, at the time of its creation, a novel idea and a new approach to solving specific issues with layout design. To me, automation is great way to repeatably do something quickly. That is the guiding principle for me when creating a solution.

 

I predict, physical verification of IC design will change alot over the next few years

I predict, physical verification of IC design will change alot over the next few years

< To be continued… taking a break here.. >


3 Responses to “Physical verification of IC layout design”


  1. November 21, 2009 at 1:25 am

    Hello,

    i subscribed because i think this is the right place for me.

    bye 🙂

  2. 2 Gaetano
    September 30, 2010 at 10:04 pm

    Hello!I am a young IC designer.I like designing ICs and the most amazing thing for me is that what I design (nets,resistors, transistors..) get on a physical chip that works!I also like the history of semiconductors and the software that have been used through the years.Unfortunately there are not lot of infos about CAD software used in the 70’s and 80’s. So I would like to ask you what about CALMA workstations?What date order do these softwares follow?Do you remember any layout tool called something like “edge”?And “Magic”…did big IC factories use this software?Thanks.

    Gaetano

  3. 3 funvinyldecals
    October 6, 2010 at 4:54 am

    I have heard of Magic but never use it. In the past, factories use K2 Viewer. Some applications may have been ported to Magic. But for viewing, Calibredrv or K2 Viewer would be good.
    Very little layout editing is done at the factory. The processing of layout is all automated and then just checking by viewing with a layout editor of your choice and checking with the “golden” tool verification (most likely Calibre).


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